Negative pin location assignments not supported for MAX V LVDS pair - Negative pin location assignments not supported for MAX V LVDS pair Description The Quartus II software does not support pin location assignments for the negative pin of an LVDS pair for MAX V devices. Resolution Please assign positive pins. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1 ['MAX® V CPLDs'] ['novalue'] ['novalue'] ['novalue']