Why does the JTAG IDCODE read fail, when performing boundary scan of an Arria II, Arria V, Stratix III, Stratix IV or Stratix V device, with a pre-configuration BSDL file? - Why does the JTAG IDCODE read fail, when performing boundary scan of an Arria II, Arria V, Stratix III, Stratix IV or Stratix V device, with a pre-configuration BSDL file?
Description When using a pre-configuration BSDL file, boundary scan should be perfomed with the nCONFIG pin pulled low. However, when the nCONFIG pin is pulled low, the device JTAG IDCODE that is read from the device may not match the one stored in the BSDL file. Resolution The JTAG IDCODE read should be performed when the nCONFIG (and nSTATUS) pins are high. Alternatively, use a post-configuration BSDL file, where it is requirement for nCONFIG to be high, when performing boundary scan. Related Articles Why do I receive an unexpected JTAG ID code error? Where can I find the pre-configuration and post-configuration BSDL file generation customizer for Stratix IV GX, Stratix IV GT, Stratix IV E, Arria II GX, and HardCopy® III devices?
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['Arria® II GX FPGA', 'Arria® V GX FPGA', 'Stratix® III FPGAs', 'Stratix® IV E FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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