Altera® FPGA Timing Closure: Hands-On Lab - This instructor-led class is taught in a virtual classroom. To perform the lab exercises, you will connect to a remote computer provided by Altera® FPGA Training and pre-configured with all the necessary tools. Information required to connect to the remote system will be provided during the class. No setup is needed. Course Description This workshop is a follow on to the Altera® FPGA Timing Closure: Lecture class. Your time during this workshop will mostly be spent using the Quartus ® Prime Software to practice timing closure techniques. There will be a brief review of the timing closure techniques and reports learned in the previous class before starting the labs. Course Objectives At course completion, you will be able to: Employ best practices for closing timing on an FPGA design in the Quartus Prime Pro software Analyze timing reports generated by Timing Analyzer as a starting point for timing closure Use the tools available in Quartus Prime Pro software to help in meeting timing Choose settings/assignments to get the best performance Identify the most common types of timing failures and how to solve them Skills Required Completion of The Quartus Prime Pro Software Design Series: Foundation course OR a working knowledge of the Quartus Prime Pro software Completion of “Quartus Prime Pro Software Design Series: Timing Analysis with Timing Analyzer” course OR a working knowledge of Synopsys* Design Constraints (SDC) and Timing Analyzer If you need assistance with this course, please email fpgatraining@altera.com . Reference Course Code: FPGA_IDSW146. FPGA_IDSW146. <p>Altera FPGA Timing Closure: Hands-On Lab</p>