Arria 10 IP with OCT Block May Fail Simulation with Questa Advanced Simulator - Arria 10 IP with OCT Block May Fail Simulation with Questa Advanced Simulator Description This problem affects all EMIF products on Arria 10 devices. The following error may occur when using the Questa Advanced Simulator to simulate Arria 10 EMIF IP containing an on-chip termination block: # ** Note: (vsim-3812) Design is being optimized... # # ** Error: altera_oct.sv(78): Cannot match types for literal init Resolution There are two workarounds for this issue: Disable optimizations by removing the -vopt flag during compilation. Modify the generated altera_oct.sv file to remove the "grave" accent character in the following line of code: localparam string OCT_CAL_MODE_S[0:11] =\'{ OCT_CAL_MODE_DER_0, Change the above line to: localparam string OCT_CAL_MODE_S[0:11] = { OCT_CAL_MODE_DER_0, This issue will be fixed in a future version. Custom Fields values: ['novalue'] Troubleshooting FB289194; True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 15.1 14.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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