Why does Quartus® IP Parameter not show the PRS interface when using R-tile Multi Channel DMA IP for PCI Express*? - Why does Quartus® IP Parameter not show the PRS interface when using R-tile Multi Channel DMA IP for PCI Express*? Description Due to a problem in the Quartus® Prime Pro Edition Software version 22.3 and later, you might not see the PRS interface even if you check the option "Enable PRS Event" on the IP Editor in the PCI Capabilities tab window, under PCIe* IP Settings. Resolution On the IP editor check the option "PF# Enable PRS" on the PCIe Avalon Settings tab widow under PCIe IP Settings. Custom Fields values: ['novalue'] Troubleshooting 14020276580 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 24.1 23.3 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']