Where can I get board simulation models for REFCLK pins using HCSL or other I/O standards? - Where can I get board simulation models for REFCLK pins using HCSL or other I/O standards?
Description Altera® IBIS, IBIS-AMI or HSPICE models do not include REFCLK models for HCSL or other I/O standards for all devices supporting high speed (GX/GT/GZ) transceivers. Resolution You can simulate this interface using HSSI HSPICE or IBIS-AMI models for transceiver RX pin. Board simulation models are located at SPICE Models for Altera Devices . Related Articles Do Altera IBIS models support the 1.5V PCML I/O standard? Where can I get IBIS models of transceiver I/O pins?
Custom Fields values:
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['Arria® GX FPGA', 'Arria® II GX FPGA', 'Arria® II GZ FPGA', 'Arria® V GT FPGA', 'Arria® V GX FPGA', 'Cyclone® IV GX FPGA', 'Cyclone® V GT FPGA', 'Cyclone® V GX FPGA', 'Stratix® II GX FPGA', 'Stratix® IV GT FPGA', 'Stratix® IV GX FPGA', 'Stratix® V GS FPGA', 'Stratix® V GT FPGA', 'Stratix® V GX FPGA']
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['novalue'] - 2021-08-25
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