Internal Error: Sub-system: ASMIO, File: /quartus/comp/asmio/asmio_reg.cpp, Line: 6596 - Internal Error: Sub-system: ASMIO, File: /quartus/comp/asmio/asmio_reg.cpp, Line: 6596 Description If you apply the set_max_skew Synopsys Design Constraints (SDC) constraint to a DQSn pin in a MAX ® 10 design that includes the LPDDR2 EMIF IP, the Quartus ® Prime Standard Edition software\'s Assembler encounters an internal error. This issue affects MAX 10 designs that target the 10M16, 10M25, or 10M50 devices. Custom Fields values: ['novalue'] Troubleshooting FB369334; True ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 16.1 16.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']