Why does the HDMI Intel® FPGA IP design example not generate a programming file in the Intel® Quartus® Prime Pro Edition Software v19.1? - Why does the HDMI Intel® FPGA IP design example not generate a programming file in the Intel® Quartus® Prime Pro Edition Software v19.1? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software v19.1, designs that use the Nios® II/e processor core without a valid Nios® II processor license will fail to generate programming files when design compilation is successful. The HDMI Intel® FPGA IP design example uses the Nios® II/e processor core. Hence, it will be impacted by this problem. Resolution To work around this problem in the Intel® Quartus® Prime Pro Edition Software v19.1, install the following patch and regenerate the HDMI Intel® FPGA IP design example: Version 19.1 patch 0.02 for Windows (.exe) Version 19.1 patch 0.02 for Linux (.run) Readme for the Intel Quartus Prime Pro Edition Software v19.1 patch 0.02 (.txt) This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software v19.2. Custom Fields values: ['novalue'] Troubleshooting 1409208402, 1507134253 False ['HDMI'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 19.2 19.1 ['Arria® 10 FPGAs and SoCs', 'Cyclone® 10 GX FPGA', 'Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']