MIPI H.264 - The MIPI H.264 IP Core is a high-performance, low-latency video encoder/decoder solution designed for real-time video compression and decompression based on the ITU-T H.264 / MPEG-4 AVC standard. Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA The MIPI H.264 IP Core is a high-performance, low-latency video encoder/decoder solution designed for real-time video compression and decompression based on the ITU-T H.264 / MPEG-4 AVC standard. This IP core is optimized for efficient integration with MIPI camera (CSI-2) and display (DSI-2) interfaces, offering seamless support for high-resolution imaging and display systems in mobile, automotive, AR/VR, surveillance, and embedded applications. Audio / Video Aerospace ASIC Proto Consumer Industrial Medical Test Transportation MIPI H.264 Key Features Compliant with H.264/AVC Standard (ISO/IEC 14496-10): Supports Baseline, Main, and High Profiles up to Level 5.1 Offering Brief No No No Yes Encrypted Verilog Verilog Agilex™ 3 FPGA C-Series Agilex™ 5 FPGA D-Series Agilex™ 5 FPGA E-Series Agilex™ 7 FPGA F-Series Agilex™ 7 FPGA I-Series Agilex™ 7 FPGA M-Series Agilex™ 9 FPGA Direct RF-Series Arria® 10 GT FPGA Arria® 10 GX FPGA Arria® 10 SX FPGA Arria® II GX FPGA Arria® V GT FPGA Arria® V GX FPGA Arria® V GZ FPGA Arria® V ST FPGA Arria® V SX FPGA Cyclone® III FPGA Cyclone® IV E FPGA Cyclone® IV GX FPGA Cyclone® V E FPGA Cyclone® V GT FPGA Cyclone® V GX FPGA Cyclone® V SE FPGA Cyclone® V ST FPGA Cyclone® V SX FPGA Stratix® 10 AX FPGA Stratix® 10 DX FPGA Stratix® 10 GX FPGA Stratix® 10 SX FPGA Stratix® 10 TX FPGA Stratix® III FPGA Stratix® IV E FPGA Stratix® IV GX FPGA Stratix® V GS FPGA Stratix® V GX FPGA Yes Yes 24.3.1 Offering Brief Production Linux, Android, RTOS a1JUi000007a1XpMAI What's Included Synthesizable RTL source code Ordering Information QB-IP-MIPI-H.264-1 a1JUi000007a1XpMAI Production Intellectual Property (IP) a1MUi00000BOWpkMAH a1MUi00000BOWpkMAH Member 2026-03-10T21:26:12.000+0000 The MIPI H.264 IP Core is a high-performance, low-latency video encoder/decoder solution designed for real-time video compression and decompression based on the ITU-T H.264 / MPEG-4 AVC standard. Partner Solutions