Why does the signal aux32_rx_rfp fail to assert when using the CPRI Intel® FPGA IP core on the Intel® Stratix®10 E-Tile? - Why does the signal aux32_rx_rfp fail to assert when using the CPRI Intel® FPGA IP core on the Intel® Stratix®10 E-Tile? Description Due to a problem in the CPRI Intel® FPGA IP core version 20.1, you may observe that the signal aux32_rx_rfp fails to assert when state_l1_synch=6, state_startup_seq=7,aux_rx_seq=63,aux_rx_x=255,aux_rx_z=149. Resolution This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 20.4. Custom Fields values: ['novalue'] Troubleshooting 1508716788 False ['Interfaces Communications CPRI (Primary)'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.4 20.1 ['Stratix® 10 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue'] - 2023-02-12

external_document