Unable to Create JESD204B IP Core Design Using Qsys-script Command - Unable to Create JESD204B IP Core Design Using Qsys-script Command Description When you use the Qsys-script command to create a JESD204B IP core design, the operation runs infinitely without giving any error message. You must perform a force exit. No JESD204B IP design is created after exiting the operation. This issue affects the JESD204B IP core in Quartus II software version 14.0 Arria 10. Resolution There is no workaround for this issue. This issue will be fixed in a future ACDS version. Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 14.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']