Why does the JESD204C Intel® FPGA IP in base only mode generated in the Intel® Quartus® Prime Pro Edition version 19.4 require regeneration in Intel® Quartus® Prime Pro Edition version 20.1 and above? - Why does the JESD204C Intel® FPGA IP in base only mode generated in the Intel® Quartus® Prime Pro Edition version 19.4 require regeneration in Intel® Quartus® Prime Pro Edition version 20.1 and above? Description The JESD204C Intel® FPGA IP in Intel® Quartus® Prime Pro version 19.4 shares the synchronizer from the Transceiver (PHY). The JESD204C Intel® FPGA IP in base only mode does not contain the Transceiver (PHY), which results in IP generation failure due to missing files for this mode. Resolution This problem is fixed in Intel® Quartus® Prime Pro Edition software version 20.1 and above. Custom Fields values: ['novalue'] Troubleshooting 1507721334 False ['JESD204B IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.1 19.4 ['Agilex™ 7 FPGA F-Series', 'Stratix® 10 MX FPGA', 'Stratix® 10 TX FPGA'] ['novalue'] ['novalue'] ['novalue']