Error (10232): Verilog HDL error at altera_merlin_burst_uncompressor.sv(174): index 5 cannot fall outside the declared range [4:0] for vector "addr_width_burstwrap" - Error (10232): Verilog HDL error at altera_merlin_burst_uncompressor.sv(174): index 5 cannot fall outside the declared range [4:0] for vector "addr_width_burstwrap" Description Due to a problem in the Quartus® II software version 11.1 and later, you may see an error similar to the above message when compiling a design containing a Qsys system. The root cause of the problem is related to master address width limitation under the following conditions: address width <= burst count width log 2 (number of symbols/burst) Resolution To work around this problem, perform one of the following two actions: Assign the slave to a higher base address which will force the master\'s address width to increase Modify the slave to have a larger address width This problem is scheduled to be fixed in a future release of the Quartus II software. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 11.1 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']