What is the state of HPS I/O pins in Cyclone V SoC and Arria V SoC device pins during cold and warm resets? - What is the state of HPS I/O pins in Cyclone V SoC and Arria V SoC device pins during cold and warm resets?
Description Hard Processor System (HPS) I/O pins on Cyclone® V SoC and Arria® V SoC devices are tristated during cold reset. At warm reset, these I/O pins retain their configuration.
Custom Fields values:
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Troubleshooting
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False
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['Cyclone® V SE FPGA']
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['novalue'] - 2021-08-25
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