Nios II Processor Generates Incorrect Results from Shift Right (SRAI, SRA) Instructions - Nios II Processor Generates Incorrect Results from Shift Right (SRAI, SRA) Instructions Description Shift right operations by the Nios II processor on Arria V and Stratix V devices might produce incorrect results in certain configurations. This issue can occur when the hardware multiplication type is set to DSP Block . When the Nios II processor executes the SRAI or SRA instruction on a negative value, the result is shifted, but not sign-extended. This issue is a result of how the DSP block wrapper is implemented for 28nm devices. Resolution You can fix this issue in the Quartus II software v12.0 by applying a patch. To obtain the patch, file a service request at mySupport , referring to solution ID number rd07032012_629 . Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] 12.0.1 11.0 ['Arria® V FPGAs and SoCs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25

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