How does the transaction count operate after grant moves to the next master when using the Intel® Stratix®10 MX HBM2 controller with the AXI* Switch? - How does the transaction count operate after grant moves to the next master when using the Intel® Stratix®10 MX HBM2 controller with the AXI* Switch? Description When a master is not ready to issue the expected total transaction, grant will go to the next master, and the transaction counts will be refreshed to the original transaction counts. Custom Fields values: ['novalue'] Troubleshooting 1507998108 False ['External Memory Interfaces Stratix® 10 FPGA IP'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 20.2 20.1 ['Stratix® 10 MX FPGA'] ['novalue'] ['novalue'] ['novalue']