Did I need to set a proper pin assignment if I running a simulation ? - Did I need to set a proper pin assignment if I running a simulation ? I am trying to run a design example simulation for AGIB027R29A1E2VR3, F-tile. Quartus version v23.3 , Questasim 2023-2. But the target devkit with proper pin selection only available for F-series devkit - non I-series devkit. If I select F-series devkit, the simulation run well. While I select "NONE" as my device is targeted AGIB027R29A1E2VR3, the simulation fail in "ld_debug". Question - Did I need to set a proper pin assignment if I running a simulation ? If the answer is YES in first question, Can I use the .qsf pin mapping from F-series F-tile and plug directly I-series F-tile ? Replies: Re: Did I need to set a proper pin assignment if I running a simulation ? clear memory, the simulation pass Replies: Re: Did I need to set a proper pin assignment if I running a simulation ? Hi, For running simulation, pin assignment is not required, but you may need to run synthesis. Using your environment I am able to run the simulation passing the ld_debug. Please check back the step, Normally the fail will occurs if your host is out of memory, the full simulation of "run -all" normally took few GBs on the memory space, I suggest to try clear the memory before re-run Regards, Wincent_Altera Replies: Re: Did I need to set a proper pin assignment if I running a simulation ? Agilex I-series ES device targeted F-tile Avalon Streaming Example Design. Replies: Re: Did I need to set a proper pin assignment if I running a simulation ? Hi, May I know which design example and document you're following? Thanks, Regards, Sheng Replies: Re: Did I need to set a proper pin assignment if I running a simulation ? I try , no2 where I use the .qsf from F-series F-tile , plug in to I-series F-tile. BUT the compilation fail . appreciate if someone can help to advise