Why is there a pin count difference between 5AGXB1 and 5AGXB7 shown in Arria® V GX FPGA migration table even though they are vertical migratable? - Why is there a pin count difference between 5AGXB1 and 5AGXB7 shown in Arria® V GX FPGA migration table even though they are vertical migratable? Description If you refer to the Arria® V GX FPGA device migration table from this link , you will find that there is a pin count difference between 5AGXGB1 and 5AGXB7 even though they are vertical migration compatible. Resolution Please refer to the correct Arria® V GX FPGA device migration table from this link . We have reviewed the pin-out file, and the Intel technical team has confirmed that 5AGXB7 has exactly the same pin layout as 5AGXB1. Thus both of the devices are pin migratable, and there are no pin differences between these two devices. Related Articles https://www.intel.com/content/dam/support/us/en/programmable/support-resources/bulk-container/pdfs/literature/sg/sg-arria-v.pdf Custom Fields values: ['novalue'] Troubleshooting 15012417089 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] No plan to fix 20.3 ['Arria® V GX FPGA'] ['novalue'] ['novalue'] ['novalue']