Pulse Width Violation in TimeQuest Report - Pulse Width Violation in TimeQuest Report Description The TimeQuest report may show minimum pulse width violation when you run full compilation on a soft-SERDES design. Resolution Specify the I/O standard for the clock pins so that the clock pins perform better and runs with a higher speed. For example, if you see pulse width violation on the rx_serial_clk and rx_serial_clk90 clock inputs, in the .qsf file add the following commands: set_instance_assignment -name IO_STANDARD LVCMOS -to rx_serial_clk set_instance_assignment -name IO_STANDARD LVCMOS -to rx_serial_clk90 Custom Fields values: ['novalue'] Troubleshooting novalue True ['novalue'] ['FPGA Dev Tools Quartus II Software'] novalue 10.0 ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue'] - 2021-08-25