Warning: Total number of single-ended output or bi-directional pins in bank <I/O bank #> have exceeded the recommended amount in a bank where dedicated LVDS, RSDS, or mini-LVDS outputs exists. - Warning: Total number of single-ended output or bi-directional pins in bank <I/O bank #> have exceeded the recommended amount in a bank where dedicated LVDS, RSDS, or mini-LVDS outputs exists.
Description You may see this warning message in the Quartus® II software when compiling a design targeting the Cyclone® III device family. This warning message may be displayed by mistake when there are not any dedicated LVDS, RSDS, or mini-LVDS outputs in the I/O bank. If no dedicated differential outputs exist in the I/O bank, then you can safely ignore this warning message. Related Articles How do I avoid differential pad placement restrictions when my design features single ended pins with a very low toggle rate?
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['novalue']
Troubleshooting
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False
['novalue']
['novalue']
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novalue
['Cyclone® III FPGAs']
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['novalue'] - 2021-08-25
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