Cyclone V - Nios V - Ethernet - Cyclone V - Nios V - Ethernet Hello, I'm working with a BeMicro CV A9 (Cyclone V) development board and I'm trying to implement Ethernet connectivity using the Triple Speed Ethernet (TSE) MAC controlled by a Nios V processor. Could anyone point me to an existing example project or tutorial that covers this integration? While my board is the BeMicro CV A9, I'm open to examples for other Cyclone V / other FPGA based boards that showcase TSE and Nios V working together. Any help or guidance would be fantastic. Thank you! Replies: Re: Cyclone V - Nios V - Ethernet I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Altera experts. Otherwise, the community users will continue to help you on this thread. Thank you. Replies: Re: Cyclone V - Nios V - Ethernet Thank you for the reply, we can close the case Replies: Re: Cyclone V - Nios V - Ethernet Hello Leonardo Tazzini, Kindly let us know if your query have been answered. Regards, Pavee Replies: Re: Cyclone V - Nios V - Ethernet Hello, You can find the user guide in this link: https://www.intel.com/content/www/us/en/products/details/fpga/intellectual-property/interface-protocols/triple-speed-ethernet-mac.html?wapkw=triple%20speed%20ethernet For design example you can get it here: https://www.intel.com/content/www/us/en/design-example/714821/intel-max-10-fpga-single-port-triple-speed-ethernet-and-onboard-phy-chip-design-example.html?wapkw=triple%20speed%20ethernet https://www.intel.com/content/www/us/en/design-example/821290/agilex-7-fpga-triple-speed-ethernet-and-onboard-phy-chip-reference-design-example.html?wapkw=triple%20speed%20ethernet Thanks.