Why does previously generated F-Tile Avalon® Streaming IP for PCI Express* IP fail to re-open in Platform Designer? - Why does previously generated F-Tile Avalon® Streaming IP for PCI Express* IP fail to re-open in Platform Designer? Description Due to a problem in the Quartus® Prime Pro Edition Design Software version 24.3.1 or earlier running on the Windows® OS, the F-Tile Avalon® Streaming IP for PCI Express* cannot be re-opened when the option Enable Hard IP Reconfiguration Interface is enabled. The Open button is greyed out in the Open IP Variant box, preventing the generated IP from being reopened in the Platform Designer. Resolution This problem is fixed starting in version 25.1 of the Quartus® Prime Pro Edition Design Software. Custom Fields values: ['novalue'] Troubleshooting 14024095367, 18040888451 False ['F-Tile Avalon-ST for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 25.1 24.3.1 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']