Why does my design have timing violations when compiled in the Quartus® II software version 15.0? - Why does my design have timing violations when compiled in the Quartus® II software version 15.0? Description Due to a problem in the Quartus® II software version 15.0 Update 1 and Update 2 for Windows, your design may fail timing if it meets the following conditions: The target device is a Stratix® V or Arria® V GZ The design implements transceivers The Quartus® II software version 15.0 Update 1 and Update 2 for Linux is not affected by this problem. Resolution To work around this problem, download and install the appropriate patch for your Quartus® II version from the links below. You must install the Quartus® II software version before installing the patch. Download the version 15.0 patch 0.31 for Windows (.exe) Download the Readme for the Quartus II software version 15.0 patch 0.31 (.txt) Download the version 15.0.1 patch 1.10 for Windows (.exe) Download the Readme for the Quartus II software version 15.0.1 patch 1.10 (.txt) Download the version 15.0.2 patch 2.11 for Windows (.exe) Download the Readme for the Quartus II software version 15.0.2 patch 2.11 (.txt) This problem is fixed beginning with version 15.1 of the Quartus® Prime software. Custom Fields values: ['novalue'] Troubleshooting 1506820960 False ['novalue'] ['FPGA Dev Tools Quartus II Software'] 15.1 15.0 ['Arria® V FPGAs and SoCs', 'Stratix® V FPGAs'] ['novalue'] ['novalue'] ['novalue']