Why doesn't the hardware script for the F-tile Interlaken Intel® FPGA IP design example work? - Why doesn't the hardware script for the F-tile Interlaken Intel® FPGA IP design example work? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3, when performing the hardware testing of the F-tile Interlaken Intel® FPGA IP design example, you might see the service master path of sysconsole_testbench.tcl is no longer valid. The following errors might occur: % source sysconsole_testbench.tcl error: claim_service: Path cannot be found while executing "claim_service master $master_path mylib" (procedure "claim_master_path" line 15) invoked from within "source sysconsole_testbench.tcl" Resolution To work around this error, you might need to follow the steps below: Replace the "jtag_phy" with "jtag_master" in the following line of the sysconsole_testbench.tcl: if { [regexp .*jtag_phy* $master_name] } { After the modification, source the sysconsole_testbench.tcl again . This problem is fixed in the Intel® Quartus® Prime Pro Edition Software version 22.4. Custom Fields values: ['novalue'] Errata 15012065370 False ['novalue'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 22.3 ['Agilex™ 7 FPGA I-Series'] ['novalue'] ['novalue'] ['novalue']