What is the Arria II GX device DQS Phase Shift Error specification? - What is the Arria II GX device DQS Phase Shift Error specification?
Description The Arria® II GX device DQS phase shift error specification is shown in the table below: Arria II GX DQS Phase Shift Error Specification Number of DQS Delay Buffer C4 speed grade I3, I5, C5 speed grades C6 speed grade 1 26ps 30ps 36ps 2 52ps 60ps 72ps 3 78ps 90ps 108ps 4 104ps 120ps 144ps The phase shift error specification listed in the table is the absolute maximum and minimum error. For example, skew on three DQS delay buffers in a C4 speed grade is 78ps or /-39ps. This specification will be included in the future release of the data sheet in the Arria II Device Handbook.
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Troubleshooting
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['Arria® II GX FPGA']
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['novalue'] - 2021-08-25
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