Why does the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* respond with Configuration Request Retry Status (CRS) for physical function 7 (PF7) when the pX_app_req_retry_en_i[6] signal for physical function 6 (PF6) is asserted? - Why does the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express* respond with Configuration Request Retry Status (CRS) for physical function 7 (PF7) when the pX_app_req_retry_en_i[6] signal for physical function 6 (PF6) is asserted? Description Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, asserting the pX_app_req_retry_en_i[6] signal affects both physical function 6 (PF6) and physical function 7 (PF7) in the R-tile Avalon® Streaming Intel® FPGA IP for PCI Express*, causing the intellectual property (IP) to respond with Configuration Request Retry Status (CRS) for either physical function. This applies when the IP is in configuration mode 0 (1x16). Resolution This problem is fixed in the 22.4 release of the Intel® Quartus® Prime Pro Edition Software. Custom Fields values: ['novalue'] Troubleshooting 15011985030 True ['R-Tile Avalon-ST for PCI Express'] ['FPGA Dev Tools Quartus® Prime Software Pro'] 22.4 22.3 ['Agilex™ 7 FPGAs and SoCs'] ['novalue'] ['novalue'] ['novalue']