Do I need to constrain Arria 10 PLL counter locations in my design to ensure that the logical counter address matches the physical counter when performing PLL reconfiguration? - Do I need to constrain Arria 10 PLL counter locations in my design to ensure that the logical counter address matches the physical counter when performing PLL reconfiguration? Description The Arria® 10 PLL recpnfiguration IP contains remapping circuitry which maps the logical counters to the physical ones. Hence the need for counter location constraining is not needed in the Quartus® Prime software version 16.1 or later for Arria 10 devices. Custom Fields values: ['novalue'] Troubleshooting novalue False ['novalue'] ['novalue'] novalue novalue ['Programmable Logic Devices'] ['novalue'] ['novalue'] ['novalue']