Stratix® 10 FPGA – HBM2 with Avalon®-MM User Side Interface and Efficiency Counters Design Example - Stratix® 10 MX FPGA HBM2 design example with Avalon® memory-mapped (Avalon-MM) user-side interfaces. Avalon-MM was introduced in Quartus® Prime Pro Edition Software v20.2 as an option for the interface protocol. - 2020-10-23

Version

20.2.0