MAX® 10 FPGA – Utilizing the User Flash Memory (UFM) with a Nios® II Processor Design Example - This design example shows how to read, write, and erase portions of the internal flash memory. The sample program included shows how to perform those three operations as well as provides a simple user interface for modifying the flash memory. - 2018-04-10
- Version
- 17.1.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > MAX Families > MAX 10
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown