Cyclone® 10 LP FPGA – Using Nios® II Processors to Replace Freescale MC9S08 Microcontrollers Design Example - The design example is intended as a Freescale MC9S08 Qsys HDL (Verilog) Design Template. The AMC1 is intended to illustrate how an Cyclone® 10 LP device with a Nios® II processor may be used in low-cost, automotive, and industrial embedded environments. While there is no ISA or binary compatibility in this example when replacing the MC9S08, most of the hardware functionality is available with a Nios II processor solution. NOTE: This design was modified from a design for the MAX® 10 device family. You will need to use an external analog-to-digital converter (ADC) and flash memory device in order to complete a working design. - 2017-06-22

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17.0.0