Arria® 10 FPGA – Triple-Speed Ethernet with IEEE 1588v2 and Native PHY Design Example - This design example demonstrates the functionalities of the Arria® 10 FPGA Triple-Speed Ethernet (TSE) with the IEEE 1588v2 feature and Arria® 10 Transceiver Native PHY IP cores on an Arria® 10 FPGA SI development board. - 2017-04-18

Version

16.1.0