Stratix® V FPGA – Stratix V GT Transceiver Signal Integrity Baseline Pinout - The Stratix® V GT Transceiver Signal Integrity (SI) Development Kit provides a platform for electrical compliance testing and interoperability analysis. The accessibility to multiple channels allows for real-world analysis as implemented in the system with transceiver channels available through SMA and popular backplane connectors. - 2016-06-09
- Version
- 16.0.0
- Product Type
- Device Families > Stratix Families > Stratix V
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Resource Type
- Developer Resources > Example Resources > Example Designs > Baseline Pinouts
- Source Name
- Markdown