Stratix® 10 FPGA – IOPLL Reconfiguration Dynamic Phase Shift Design Example - This design demonstrates the implementation of the I/O PLL dynamic phase shift reconfiguration using the IOPLL Reconfig Altera® FPGAs IP core. The dynamic phase shift reconfiguration can determine the number of shifts, the direction of the phase shift, and the output clock to be shifted. - 2017-10-27

Version

17.1.0