MAX® 10 FPGA – SPI Slave to Six UART Master Design Example - Bridge between a serial peripheral interface (SPI) slave and six UART masters. - 2016-11-06

Version
16.0.0
Product Type
Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
Device Families > MAX Families > MAX 10
Resource Type
Developer Resources > Example Resources > Example Designs > System Example Designs
Source Name
Markdown