MAX® 10 FPGA – Nios® II Processor On-Die Temperature Sensor Design Example - This design example uses a Nios® II processor and a Qsys interconnect to demonstrate how to read the on-die temperature sensor on Terasic's MAX® 10 FPGA-based DE10-Lite Development Kit. It also demonstrates a simple parallel I/O read/write interface. - 2017-01-26
- Version
- 16.1.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > MAX Families > MAX 10
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown