MAX® 10 FPGA – Nios® II Processor ADC / LCD Display Controller Design Example: MAX® 10 FPGA 10M50 Evaluation Kit - Demonstrates how to connect and use the analog-to-digital converter (ADC) and display results on an LCD controller using the MAX® 10 FPGA 10M50 Evaluation Kit. Note that you need a Pmod CLP LCD in addition to your development kit. - 2016-06-06

Version

16.0.0