Cyclone® 10 LP FPGA – Nios® II Processor "Hello World" Design Example - Embedded system implementation using the Nios® II processor, on-chip memory, JTAG UART, and PIO. Utilizes push buttons and LEDs to allow interaction with the Cyclone® 10 LP FPGA Evaluation Kit. - 2017-08-22
- Version
- 17.0.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown