MAX® 10 FPGA – ADC with Threshold Violation Detection Design Example - The analog-to-digital converter (ADC) compares output data with a defined threshold data, which can be used as a status flag, to trigger other circuits when exceeding the maximum threshold level, or when it goes below the minimum threshold level. - 2016-05-18
- Version
- 16.0.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > MAX Families > MAX 10
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown