Stratix® 10 FPGA – H-Tile CvP for Update Mode Design Example - Configuration via Protocol (CvP) is a configuration scheme supported in the Stratix® 10 device family. The CvP configuration scheme creates separate images for the periphery and core logic. You can store the periphery image in a local configuration device and the core image in host memory, reducing system costs and increasing the security of the proprietary core image. CvP configures the Altera® FPGAs fabric through the PCI Express* (PCIe*) link and is available for endpoint variants only. This document describes the CvP configuration scheme for the Stratix® 10 device family. The CvP configuration scheme targets the core fabric configuration through the PCIe* link, which means it only supports FPGA Configuration First Mode even if you use Stratix® 10 SoC devices. - 2019-10-10

Version

19.3.0

Product Type

Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Pro Edition

Device Families > Stratix Families > Stratix 10

Resource Type

Developer Resources > Example Resources > Example Designs > System Example Designs

Source Name

Markdown