Cyclone® V FPGA – Generic Serial Flash Interface and Nios® II Processor Booting Design Example - This design example demonstrates flash operations such as read memory, program, erase, sector protect and sector unprotect as well as Nios® II processor booting using the Generic Serial Flash Interface Altera® FPGAs IP. - 2020-02-24
- Version
- 18.1.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > Cyclone Families > Cyclone V
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown