MAX® 10 FPGA – FPGA Intro with a PLL, Multiplexer, and Counter on the MAX® 10 FPGA Development Kit Design Example - This design example will guide you through the complete design cycle from design entry to configuring the MAX® 10 FPGA on the MAX® 10 FPGA Development Kit. This is the final solution of this lab. Refer to the documentation on how to recreate this design example. - 2016-05-17

Version

16.0.0