Cyclone® V FPGA – Terasic DE1-SoC Development Kit Baseline Pinout - Baseline pinout with pin names and proper I/O voltage settings for the Terasic DE1-SoC Development Kit. - 2018-04-03
- Version
- 17.1.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > Cyclone Families > Cyclone V
- Resource Type
- Developer Resources > Example Resources > Example Designs > Baseline Pinouts
- Source Name
- Markdown