Arria® 10 FPGA – Data Word Alignment Calibration Through Loopback Between PHY Lite for Parallel Interfaces Instances Design Example - This design example demonstrates data word-alignment calibration through PHY Lite dynamic reconfiguration. The reference design also includes guidelines on constraining PHY Lite I/Os for FPGA-to-FPGA applications. - 2016-08-04

Version

16.0.0

Product Type

Device Families > Arria Families > Arria 10

Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition

Resource Type

Developer Resources > Example Resources > Example Designs > System Example Designs

Source Name

Markdown