Cyclone® V FPGA – Terasic SoCKit Baseline Pinout - This is the baseline pinout for the Cyclone® V SoC FPGA-based SoCKit. This pinout is for the Rev D version which includes the HPS_LCM_BK signal and production FPGA device. - 2015-12-15

Version
16.0.0
Product Type
Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
Device Families > Cyclone Families > Cyclone V
Resource Type
Developer Resources > Example Resources > Example Designs > Baseline Pinouts
Source Name
Markdown