Cyclone® V FPGA – Terasic DE0-CV Board Baseline Pinout - Baseline pinout for the Terasic DE0-CV Board. - 2017-06-12
- Version
- 17.0.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Standard Edition
- Device Families > Cyclone Families > Cyclone V
- Resource Type
- Developer Resources > Example Resources > Example Designs > Baseline Pinouts
- Source Name
- Markdown