MAX® 10 FPGA – Boot from On-Chip Flash Design Example - This is a design demonstrating fast booting time and accelerated execute-in-place (XIP) performance for on-chip flash memory access. This tutorial describes a simple boot from on-chip flash and XIP reference design using Synaptic Labs' Tiny System Cache IP and Altera®'s on-chip flash memory controller. This reference design can be easily modified for other development boards such as the Arrow DECA board and MAX® 10 FPGA development board. - 2018-08-06

Version
17.1.1