Stratix® 10 FPGA – AN881: PCIe* 3.0 x16 Avalon® Memory-Mapped DMA with DDR4 and HBM2 Reference Design - This reference design demonstrates the performance of the Avalon® memory-mapped (Avalon-MM) Stratix® 10 FPGA hard IP+ for PCIe*, a high-performance DMA controller with two types of memory solutions: external (DDR4) and HBM2 memories. The Read Data Mover moves data from the system memory to the external or HBM2 memory in the Avalon-MM space. The Write Data Mover moves data from the external or HBM2 memory in the application logic to the system memory in the PCIe space. - 2019-04-11
- Version
- 19.2.0
- Product Type
- Development Software and Tools > FPGA Design & Simulation Tools > Quartus Prime Design Software > Pro Edition
- Device Families > Stratix Families > Stratix 10
- Resource Type
- Developer Resources > Example Resources > Example Designs > System Example Designs
- Source Name
- Markdown