Stratix® 10 FPGA – AN 830: Altera® FPGAs Triple-Speed Ethernet and Onboard PHY Chip Reference Design - This reference design demonstrates the Ethernet operation between the Stratix® 10 FPGA Triple-Speed Ethernet IP core and onboard Marvell 88E1111 PHY chip in the Stratix® 10 GX FPGA Development Kit (L-Tile). - 2017-12-12

Version

20.4.0