Arria® 10 FPGA – PHY Lite with Dynamic Reconfiguration Loopback Reference Design - This is a PHY Lite hardware reference design that is targeting an Arria® 10 FPGA development kit. The reference design provides the ability to perform dynamic reconfiguration to the PHY Lite IP cores using a Nios® II soft processor in a loopback system. - 2016-05-16

Version

16.0.0