Altera AXI4 Bus Functional Model User Guides - Describes use of the Altera AXI4 Bus Functional Models to simulate the behavior and facilitate the verification of Altera IP. - 2025-05-19
Version
25.1
1. Answers to Top FAQs
2. Altera AXI4 Memory-Mapped BFM User Guide
2.1. Altera AXI4 Memory-Mapped BFM Overview
2.1.1. Altera AXI4 Memory-Mapped Specification Support
2.1.2. Altera AXI4 Memory-Mapped BFM Components
2.1.3. Altera AXI4 Memory-Mapped Supported Features
2.1.4. Altera AXI4 Memory-Mapped BFM SystemVerilog Packages
2.1.5. Altera AXI4 Memory-Mapped BFM Supported Flows
2.1.6. Altera AXI4 Memory-Mapped BFM Supported Simulators
2.2. Altera AXI4 Memory-Mapped BFM Architecture
2.2.1. Altera AXI4 Memory-Mapped Manager BFM Architecture
2.2.2. Altera AXI4 Memory-Mapped Subordinate BFM Architecture
2.2.3. Altera AXI4 Memory-Mapped Monitor BFM Architecture
2.2.4. Altera AXI4 Memory-Mapped BFM Transaction Class
2.2.4.1. Altera AXI4 Transaction Information
2.3. Altera AXI4 Memory-Mapped BFM Configuration and Interfaces
2.3.1. Altera AXI4 Memory-Mapped Manager BFM Configuration
2.3.2. Altera AXI4 Memory-Mapped Manager BFM Interface
2.3.3. Altera AXI4 Memory-Mapped Subordinate BFM Configuration
2.3.4. Altera AXI4 Memory-Mapped Subordinate BFM Interface
2.3.5. Altera AXI4-Lite Memory-Mapped Manager BFM Configuration
2.3.6. Altera AXI4-Lite Memory-Mapped Manager BFM Interface
2.3.7. Altera AXI4-Lite Memory-Mapped Subordinate BFM Configuration
2.3.8. Altera AXI4-Lite Memory-Mapped Subordinate BFM Interface
2.3.9. Altera AXI4 Memory-Mapped Inline Monitor Configuration
2.3.10. Altera AXI4 Inline Monitor Interface
2.4. Using the Altera AXI4 Memory-Mapped BFMs
2.4.1. Using the Altera AXI4 Memory-Mapped Manager BFM Flow
2.4.2. Using the Altera AXI4 Memory-Mapped Subordinate BFM Flow
2.4.3. Using the Altera AXI4 Memory-Mapped Monitor BFM Flow
2.4.4. Altera AXI4 Memory-Mapped Manager RTL Implementation Example
2.4.5. Altera AXI4 Memory-Mapped Manager Platform Designer BFM Implementation Example
2.5. Altera AXI4 Memory-Mapped BFM API
2.5.1. Altera AXI4 Memory-Mapped BFM Configuration API
2.5.2. Altera AXI4 Memory-Mapped BFM Reset API
2.5.3. Altera AXI4 Memory-Mapped Manager Transaction Creation API
2.5.4. Altera AXI4 Memory-Mapped Subordinate Transaction Creation API
2.5.5. Altera AXI4 Memory-Mapped Transaction Configuration API
2.5.6. Altera AXI4 Memory-Mapped BFM Transaction Execution API
2.5.7. Altera AXI4 Memory-Mapped Host Memory API
2.6. Altera AXI4 Memory-Mapped Assertions
3. Altera AXI4 Streaming BFM User Guide
3.1. Altera AXI4 Streaming BFM Overview
3.1.1. AXI4 Protocol Specification Support
3.1.2. Altera AXI4 Streaming BFM Components
3.1.3. AXI4 Streaming Supported Features
3.1.4. Altera AXI4 Streaming BFM SystemVerilog Packages
3.1.5. Altera AXI4 Streaming BFM Supported Flows
3.1.6. Altera AXI4 Streaming BFM Supported Simulators
3.2. Altera AXI4 Streaming BFM Architecture
3.2.1. Altera AXI4 Streaming BFM Data Organization
3.2.1.1. Altera AXI4 Streaming BFM Beats
3.2.1.2. Altera AXI4 Streaming BFM Transfers
3.2.1.3. Altera AXI4 Streaming BFM Packets
3.2.2. AXI4 Streaming Data Transfer
3.2.3. Altera AXI4 Streaming Transmitter BFM
3.2.4. Altera AXI4 Streaming Receiver BFM
3.3. Altera AXI4 Streaming BFM Configuration and Interfaces
3.3.1. Altera AXI4 Streaming Transmitter BFM Configuration
3.3.2. Altera AXI4 Streaming Transmitter BFM Interfaces
3.3.3. Altera AXI4 Streaming Receiver BFM Configuration
3.3.4. Altera AXI4 Streaming Receiver BFM Interface
3.4. Using the Altera AXI4 Streaming BFMs
3.4.1. Using the Transmitter BFM Flow
3.4.2. Using the Receiver BFM Flow
3.4.3. Altera AXI4 Streaming BFM Tools
3.4.3.1. Number Formatting
3.4.3.2. Transfer Printing
3.4.3.3. Transfer Comparison
3.4.4. Altera AXI4 Streaming BFM RTL Example
3.4.5. Altera AXI4 Streaming BFM Platform Designer Example
3.5. Altera AXI4 Streaming BFM Packages, Classes, Interfaces, and Modules
3.5.1. Altera AXI4 Streaming Common BFM Packages, Classes, Interfaces, and Modules
3.5.1.1. Package axi4_stream_bfm_types_pkg
3.5.1.1.1. Typedefs
3.5.1.1.2. Utility Function num_formatter
3.5.1.1.3. Interface axi4_stream_if
3.5.1.1.4. AXI4 Streaming Interface Modports
3.5.1.1.5. Protocol-Checking Assertions
3.5.1.2. Package axi4_stream_bytes_class_pkg
3.5.1.2.1. Class Axi4StreamBytes
3.5.1.2.2. Data Members in Axi4StreamBytes Class
3.5.1.2.3. Methods in Axi4StreamBytes Class
3.5.1.2.4. Class Axi4StreamBytesData
3.5.1.2.5. Methods in Axi4StreamBytesData Class
3.5.1.2.6. Class Axi4StreamBytesPosition
3.5.1.2.7. Methods in Axi4StreamBytesPosition Class
3.5.1.2.8. Class Axi4StreamBytesNull
3.5.1.2.9. Methods in Axi4StreamBytesNull Class
3.5.1.2.10. Class Axi4StreamBytesDataError
3.5.1.2.11. Data Members in Axi4StreamBytesDataError Class
3.5.1.2.12. Methods in Class Axi4StreamBytesDataError
3.5.1.2.13. Class Axi4StreamBytesPositionError
3.5.1.2.14. Data Members in Class Axi4StreamBytesPositionError
3.5.1.2.15. Methods in Class Axi4StreamBytesPositionError
3.5.1.2.16. Class Axi4StreamBytesNullError
3.5.1.2.17. Data Members in Class Axi4StreamBytesNullError
3.5.1.2.18. Methods in Class Axi4StreamBytesNullError
3.5.1.3. Package axi4_stream_transfer_class_pkg
3.5.1.3.1. Class Axi4StreamTransfer
3.5.1.3.2. Data Members in Class Axi4StreamTransfer
3.5.1.3.3. Methods in Class Axi4StreamTransfer
3.5.1.4. Package axi4_stream_packet_class_pkg
3.5.1.4.1. Class Axi4StreamPacket
3.5.1.4.2. Data Members in Class Axi4StreamPacket
3.5.1.4.3. Methods in Class Axi4StreamPacket
3.5.2. Altera AXI4 Streaming Transmitter BFM Packages, Classes, and Modules
3.5.2.1. Package axi4_stream_bfm_transmit_pkg.sv
3.5.2.1.1. Class TransmitBFM
3.5.2.1.2. Module axi4_stream_bfm_transmit_top
3.5.2.1.3. Method Prototypes in Class TransmitBFM
3.5.3. Altera AXI4 Streaming Receiver BFM Packages, Classes, and Modules
3.5.3.1. Package axi4_stream_bfm_receive_pkg.sv
3.5.3.1.1. Class ReceiveBFM
3.5.3.1.2. Module axi4_stream_bfm_receive_top
3.5.3.1.3. Method Prototypes in Class ReceiveBFM
4. Document Revision History of Altera AXI4 Bus Functional Model User Guides
A. API Translation: Mentor* VIP to Altera AXI4 Memory-Mapped BFM